UCLA Extension

Transmission Lines

A 1-Day Short Course

This is one of five courses that comprise a week of instruction in high-speed digital design/EMI. Participants may take it on a stand-alone basis or in any combination with the other four courses:

Course Materials

Lecture notes are distributed on the day of the course. These notes are for participants only and are not for sale. Fee includes materials for each course(s) taken.

Coordinator and Lecturer

Robert Hanson, MSEE, President, Americom Seminars, Inc., Bremerton, Washington. Mr. Hanson has over 40 years of experience in the design manufacturing and test areas. His initial education was in industrial engineering (IE) and business administration. After receiving his BSEE/MSEE, he became highly involved in all aspects of electronic testing. As a digital design engineer at The Boeing Company, Rockwell, Honeywell, and Loral, Mr. Hanson designed and provided prototype operational analysis on many high-speed designs, including PCBs for AWACS, B1-B, 747-400, missiles, and ground support test equipment. He has played a very active role in automating the line, implemented robotics, participated in producibility studies, and automatic material handling. He has held positions responsible for overseeing and working in the CAE/CAD/CAT, JIT, simulation, and automatic assembly environments. He also has performed studies and headed research projects in the computer-integrated manufacturing environment. Mr. Hanson has extensive experience in the testing disciplines (both factory and field, commercial and military) and has been the testability overseer for Boeing Commercial Airline products.

Course Program


  • Frequency, time, and distance
  • Lumped versus distributed systems
  • EM fields
  • Geometry, C, L, and Zo interrelationships
  • C&L resonance

High-Speed Properties of Logic Gates

  • Quiescent versus active dissipation
  • Driving capacitive loads
  • Input power and external power
  • TTL, CMOS, SiGe, In Ph, ECL, and GaAs; output power, speed and engineering disciplines, Dv, di effects and voltage margins
  • Intersymbol Interference (ISI), eye diagrams and jitter
  • Shoot Through Current (SSO) and how to minimize it
  • Ground bounce, lead inductance, Simultaneous Switching Noise (SSN)
  • Viewing a serial data transmission system, the eye pattern closure: ISI, skin effect, and tan loss
  • PLL and DLLs

Transmission Line Characteristics

  • The quality factor, Q, and why lumped circuits can ring and cause EMI
  • Infinite uniform transmission line
  • Effects of source and load impedance
  • Special transmission line cases
  • Determining line impedance and propagation delay using TDR and VNA
  • Skin/proximity effect and dielectric loss
  • The capacitive load: Zo and propagation delay
  • Matching Zo with trace alturations (neckdowns): minimizing the C load
  • 90o, 45o bends: are they concerns?
  • Characteristics of T. lines: coax, pair, micro strip, buried micro strip, stripline and differential: asymmetric, dual, edge

For more information contact the Short Course Program Office:
shortcourses@uclaextension.edu | (310) 825-3344 | fax (310) 206-2815