This course benefits scientists, engineers, and hardware managers involved with CCD/CMOS imagers and high-performance camera systems. Basic solid-state theory and operation of CCD/CMOS imagers is covered, as well as advances made in producing large pixel arrays (10k x 10k pixels) with high-quantum efficiency (spectral coverage 1 to 11,000 A); high-charge transfer efficiency (>99.9999%); high-charge collection efficiency (MTF>50% at Nyquist); low read noise (sub-electron); high-dynamic range (>106); and ultra-low dark current (1 pA/cm 2 at 300K). Ultimate performance limits are outlined and fundamental performance differences between CCD/CMOS technologies and high-performance CCD/CMOS pixel architectures are discussed. Backside-illuminated imagers are covered for UV, EUV, x-ray, and particle detection applications; high QE frontside-illuminated sensors; deep depletion CCD/CMOS imagers; high-speed/low-noise parallel readout imagers; CMOSCCDs; and CMOS/CMOS hybrid imagers.ENROLL NOW
The course reviews chip cost, image cosmetics and shorts, device yield, popular chip foundries, and custom-designed and off-the-shelf sensors. The photon transfer (PT) technique, a valuable testing methodology employed in the design, operation, characterization, optimization, calibration, specification, and application of solid-state imagers and camera systems, is discussed in detail. Numerous experimental PT data products generated by CCD and CMOS imagers are presented. Correlated double sampling (CDS) theory used to achieve ultra low-noise performance is outlined. Pixel encoding compression techniques applied in camera systems is demonstrated. High-energy radiation damage measurements on CCD/CMOS imagers are covered in detail. The course includes a look at future research and development trends for each technology.
The course also helps participants to:
- Become familiar with basic fundamental theory and operation of CCD/CMOS imagers
- Understand how CCD/CMOS video signals are processed for optimum signal-to-noise performance
- Explain how CCD and CMOS arrays are designed and fabricated
- Recognize operational, performance, and pixel architecture differences between CMOS and CCD imagers
- Become familiar with current and future CCD/CMOS technologies and applications
- Have a sound and practical understanding of how CCD/CMOS sensors and cameras are characterized and calibrated through the PT technique.
- List CCD/CMOS performance specifications and requirements to help specify and select a sensor or camera system
The texts, Scientific Charge-Coupled Devices and Photon Transfer , James R. Janesick (SPIE Press, 2000 and 2007) and lecture notes are distributed on the first day of the course. The notes are for participants only and are not otherwise available for sale or unauthorized distribution.
Coordinator and Lecturer
James R. Janesick, MSEE, Director, CMOS Advanced Development Group, SRI International, Huntington Beach, California. Mr. Janesick has been with SRI International for 11 years. He was previously with Conexant Systems Inc. developing CMOS imaging arrays for commercial applications; technology director of Pixel Vision, Inc., for five years developing high-speed backside-illuminated CCDs for scientific and cinema cameras; and with the CIT/NASA Jet Propulsion Laboratory for 22 years, where as group leader he designed various CCD imagers and support electronics for scientific ground and flight-based imaging systems.
Mr. Janesick has authored 76 publications and has contributed to several NASA Tech Briefs and patents for various CCD and CMOS innovations. He is the author of two textbooks, Scientific Charge-Coupled Devices and Photon Transfer. He received NASA medals for Exceptional Engineering Achievement in 1982 and 1992, was the recipient of the SPIE Educator Award in 2004, and was SPIE/IS&T Imaging Scientist of the Year in 2007.
Participant Introductions, Interests, and Imaging Applications
Introduction to CCD and CMOS Theory, Operation, Architecture, Design, and Fabrication
- Review operational differences between CCD and CMOS imagers and general performance advantages for each technology.
- Discuss fundamental CCD/CMOS pixel solid-state theory and operation in terms of charge generation, collection, transfer, and measurement.
- Define the photoelectric effect, MOS capacitor, charge coupling, depletion, potential wells, and buried and surface channel operation.
- Requirements for silicon wafer quality used for high-performance imagers.
- Discussion of image defects, shorts, device yield, popular chip foundries, and imager cost.
- Popular high-performance CCD/CMOS pixel architectures.
- Fabrication processes used to manufacturer CCD/CMOS imagers.
- Custom and off-the-shelf sensors available to the imaging community.
- Review on-chip analog and digital circuitry for CMOS imagers.
- Pixel readout modes and comparison of performance features (e.g., frame transfer, interline transfer, full frame, progressive scan, TDI, rolling shutter, snapshot, etc.).
- Exciting future research and development trends for upcoming CMOS imagers (e.g., CMOSCCD, ultra-large stitched CMOS imagers, vertically integrated CMOS/CMOS hybrid sensors).
Day 1 & 2
CCD/CMOS Performance Transfer Curves
- Review essential standard transfer curves employed to characterize, calibrate, optimize, and specify absolute CCD/CMOS performance parameters (e.g., signal-to-noise, nonlinearity, charge capacity, read noise, dynamic range, quantum efficiency, charge transfer efficiency, charge collection efficiency, fixed pattern noise, and dark current).
- Review photon transfer (PT) theory.
- Discuss fundamentals in photo electron-hole generation, PT noise sources, PT curve (PTC) generation, common PTC errors, PT nonlinearity, flat fielding and modulation PT (MPT).
- Present the x-ray transfer technique used to measure absolute charge collection and transfer efficiency performance.
- Present numerous experimental PT and x-ray data products generated by CCD and CMOS imagers.
CCD and CMOS Performance Limits; Charge Generation, Collection, Transfer, and Measurement
- Performance limits in generating signal charge and methods used to measure quantum efficiency and quantum yield performance.
- Frontside and backside thinning technologies for near ideal QE performance over the near IR-x-ray wavelength range.
- Performance limits behind charge collection efficiency (CCE).
- Carrier diffusion and pixel modulation transfer function (MTF) cross-talk loss mechanisms.
- X-ray point spread characterization.
- Aliasing and Moire effects related to CCD/CMOS pixels.
- Experimental MTF data products.
- Performance limits behind charge transfer efficiency (CTE).
- Solid-state charge transfer mechanisms fundamental to CCD/CMOS pixels.
- Common charge transfer problems and solutions.
- Performance limits behind read noise performance.
- Flicker, white noise, and random telegraph signal (RTS) noise sources associated with CCD/CMOS pixels.
- Describe correlated double sampling theory and related electronic camera designs used to achieve ultra-low noise performance.
- Sub-electron noise pixels and associated signal processing techniques for single photon counting applications.
- Important pixel noise sources (blooming, residual image, fixed pattern noise, image lag, image reversal, reset noise, thermal dark current, cosmic rays, spurious charge, luminescence, excess charge, substrate bounce, etc.) and related noise reduction techniques (e.g., flat fielding and thermal cooling).
- Signal processing noise sources (e.g., amplifier, ADC quantizing noise, electrical interference, ground noise, etc.).
- Pixel video compression and extended dynamic range techniques.
- Review of radiation and ESD sensor damage.
Date: Mar 7-9 (Mon-Wed)
Time: 8am-5pm (subject to adjustment after the first class)
Course No.: Engineering 823.90
Units: 1.8 CEU (18 hours of instruction)
Fee: Through Feb 7: $2,905 / After: $3,195
For more information contact the Short Course Program Office:
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