UCLA Extension

Integrated Circuit Reverse Engineering

With advances in technology and globalization of design centers and fabrication foundries reverse engineering of integrated circuits is both an offensive and defensive act to ensure reliability and integrity of integrated circuits, prevent or enable cyber attacks, detect counterfeit parts, study competitors and enemy state designs or protect intellectual properties against theft. It can also be invaluable when it comes to address challenges with obsolescence. This course covers the art and science of reverse engineering of digital, analog and mixed signal integrated circuits (ICs) to extract the IC’s properties, architecture, circuitry (netlist) and layout. It covers both destructive and non-destructive reverse engineering techniques including fabrication processes, delayering techniques, Scanning Electron Microscopy (SEM) imaging, Focused Ion Beam (FIB) application, optical and laser-based imaging, thermo-reflectance imaging, netlist extraction, hierarchy extraction, GDS layout extraction, library cell extraction, spice parameter extraction, encryption bypass, embedded memory (ROM) content extraction, anti-fuse microcode extraction, and anti-tamper / anti-hacking circuits.

Complete Details

The content of this course is useful to both designers and end users. Designers will learn the vulnerability of their designs and how to guard against sabotage, back door attack, cyber attack and more. What they learn will help them design integrated circuits that will be more reliable and less prone to attack or sabotage. End users will learn the nature of attacks that faces the electronics, the ease or difficulty by which a system or integrated circuit can be compromised.

The content of this course is also invaluable for addressing obsolescence. Many defense and aerospace companies suffer from obsolescence due to the long life cycles of their products or products that use their hardware such as commercial airplanes, military aircrafts, tanks, military hardware and more. In such situations the existing designs have become too old and in order to continue providing parts or maintenance they need to fabricate more integrated circuits but in newer technologies. This requires technology transfer of their integrated circuits from let’s say 800 nm node size in the 1990s to 65 nm node size in 2014. This could impose major difficulties with the netlist, layout and timing. Furthermore, many designs in the industry is redesign, meaning they do not start from scratch, rather they take an older design and modify it. Sometimes these older designs are not available and requires reverse engineering of a part to obtain it.

Any digital or analog design engineer, process engineer, fab technician, IT and cyber security personnel and project managers can benefit greatly from this course.

Prerequisite

Basic knowledge of integrated circuits or digital and/or analog circuits

Course Objectives

To improve students’ understanding of the art and science of reverse engineering of integrated circuits. Upon successful completion of the course, the students will be become familiar with:

  • Importance of reverse engineering capabilities in the modern world
  • Fabrication process
  • Delayering of integrated circuits
  • Imaging and image processing techniques
  • Netlist and layout extraction
  • Counterfeit detection
  • Anti-tamper / anti-hacking techniques
  • Obsolescence and technology transfer
  • Reverse Engineering tools

Coordinator and Lecturer

Parviz Saghizadeh, Ph. D. – Dr. Parviz Saghizadeh received his B.S. in electrical engineering from Drexel University and M.S. and Ph.D. in electrical engineering from University of California, Los Angeles (UCLA). Dr. Saghizadeh has over 30 years of experience in the areas of digital and analog integrated circuit (IC) design and digital signal processing. He has been with Raytheon (formerly Hughes Aircraft) for over 19 years where he has held varying lead positions, including principal investigator and program manager for multiple DARPA funded R&D programs and ASIC and technical lead for many multi-million dollar design projects. Dr. Saghizadeh is also an adjunct professor at California State University at Long Beach (CSULB) where he teaches graduate level digital and analog circuit design. Dr Saghizadeh has authored or co-authored numerous publications and disclosures and has a number of patents to his credit.
Dr. Saghizadeh has extensive experience in the areas of digital and mixed signal IC design, reverse engineering of integrated circuits (ICs), counterfeiting, IC security and IC integrity. He has worked on a number of projects together with DARPA, BAE systems, Georgia Tech, USC-ISI, University of Colorado at Boulder, SRI and MicroNet Solutions researching and developing advanced techniques and methodologies in reverse engineering of ICs and in establishing TRUST in the IC design process flow from Spec to VHDL/Verilog/Spice netlist, post place and route netlist, layout and fabrication.

Course Program

Day 1

  • Fabrication process
  • Delayering
  • Imaging (Destructive and non-destructive)
  • Image processing

Day 2

  • Netlist and hierarchy extraction
  • Layout extraction
  • ROM content extraction

Day 3

  • Counterfeit detection
  • Anti-tamper / anti-hacking
  • Obsolescence and technology transfer
  • Reverse Engineering tools

For more information contact the Short Course Program Office:

shortcourses@uclaextension.edu | (310) 825-3344 | fax (310) 206-2815

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